Exclusive Interview with Runal: Insights into FPGA Design

My name is Runal Palkar, and I am working as an FPGA R&D Engineer at Logic Fruit Technologies. 

My work focuses on RTL design and functional verification of high-speed interconnect protocols such as ARINC 818, CXL 2.0, and CXL 3.0, along with FPGA prototyping for SoC peripheral integration.

My journey with FPGA design started during my internship at Logic Fruit Technologies, where I worked on the ARINC 818 IP project. I developed testbenches, implemented new features in both Verilog and VHDL, performed functional verification of new features using QuestaSim, and validated the design on a Xilinx Kintex KC-705 FPGA board.

As a full-time FPGA R&D Engineer, I have been involved in two major projects. The first is the CXL 2.0 and CXL 3.0 Analyzer, where my role includes hardware validation of protocol features, developing Python scripts for packet decoding, precise triggering feature testing, and test stimulus generation, and contribution to timing closure optimization.

The second is ARM SoC Prototyping, where I am currently working on integrating various peripheral controllers like UART, PDM, PWM, and DMIC interfaces. I have also implemented a Verilog RTL model of the AMBA APB protocol to strengthen my understanding of SoC peripheral communication.

These projects have given me strong hands-on exposure to RTL design, functional verification, FPGA prototyping, debugging with ILA, automation scripting, and basic timing closure, which I continue to build on in my current role.

FPGAs provide several unique benefits over general-purpose processors (CPUs, GPUs) and fixed-function hardware (ASICs):

Hardware-Level Parallelism & Low Latency– CPUs execute instructions sequentially, GPUs use thread-based parallelism, while FPGAs allow true hardware-level parallelism.

Multiple tasks can run simultaneously with nanosecond-level latency.
Example: In high-frequency trading (HFT), FPGAs process multiple data streams in real-time, where even microseconds matter.

Reconfigurability & Real-Time Processing– FPGAs can be reprogrammed multiple times without altering the hardware, allowing designs to be adapted or updated within the FPGA’s capabilities.

This is very useful in evolving standards – eg, in avionics, automotive, and defense sectors where real-time system monitoring is required, FPGAs come in handy.

ASICs, by contrast, are fixed after fabrication.

Partial Reconfiguration– A unique feature of an FPGA is that we can reconfigure a specific part of the FPGA while the rest of the system continues running as it was earlier.

FPGA is divided using constraints into a static region (main design), which keeps running independently, and reconfigurable regions where separate functionality bitfiles can be tested. 

This allows for dynamic swap functionality, without altering the entire system.

SoC Integration (CPU + FPGA)– FPGAs are good at parallel processing, while processors are good at sequential tasks.

They actually complement each other, so modern SoC devices like the ARM MPS3 FPGA board combine ARM processors with an FPGA.

Power Efficiency for specific workloads– FPGAs can be customized so that only the required logic is active, making them more power-efficient than CPUs/GPUs for certain workloads.

In short, FPGAs offer the best of both worlds: hardware-level speed and parallelism like ASICs, combined with the flexibility and adaptability of software.

Over the past year, I’ve noticed distinct FPGA trends have emerged across both low-end and high-end devices.

Low-end FPGAs trends are increasingly adopted in edge and embedded systems, such as IoT devices, small controllers, and real-time monitoring modules, thanks to their low power consumption, compact size, and the availability of accessible development boards and open-source toolchains. 

High-end FPGAs are primarily used in AI acceleration, 5G, and high-performance computing, often integrated into SoCs that combine CPUs, FPGA fabric, and even AI engines.

Chiplet-based modular designs are also emerging, providing flexibility and scalability for complex applications. Security has become a bigger focus, with features like secure boot and bitstream encryption being standard in cloud, telecom, automotive, and aerospace systems.

I believe these trends are shaping a future where FPGAs become a central part of heterogeneous computing, enabling low-latency, power-efficient solutions that can adapt quickly to evolving workloads and standards, bridging the gap between edge, embedded, and high-performance systems.

I see FPGA development evolving in a few key ways to keep up with modern applications and complex workloads.

On the software side, tools are becoming more accessible with High-Level Synthesis (HLS), Python frameworks, and AI-assisted design, which means you don’t always need to write everything in low-level HDL. 

On the hardware side, FPGAs are getting faster, with more logic resources, high-speed transceivers, and dedicated AI/DSP blocks, making them ideal for workloads like AI, 5G, and real-time processing.
 
I also think we’ll see more domain-specific designs and tighter integration with CPUs in heterogeneous systems, so FPGAs can handle parallel tasks while processors manage sequential ones. 

Overall, this makes FPGAs more flexible, power-efficient, and easier for developers to use, which is essential as applications become more demanding and diverse.

First is the hardware-level parallelism and low latency, which make it ideal for real-time applications like high-frequency trading, 5G base stations, and automotive. 

Second is reconfigurability and flexibility, which allow industries to adapt designs, experiment with new functionality, or update features within the FPGA’s capabilities without changing the hardware, reducing cost and time-to-market. 

Third is the power efficiency for specialized workloads, which increases demand as compared to CPUs and GPUs. Another important driver is that it can be combined with CPUs or SOCs for balancing sequential and parallel processing.

Telecom & 5G: Used for fast data packet handling, flexible baseband processing, and quick support for new communication standards.

Automotive: Helps in combining data from multiple sensors and supporting ADAS or autonomous driving features with real-time response.

Finance (HFT): Enables extremely low-latency trade execution and instant risk checks, where even microseconds are critical.

Defense & Aerospace: Preferred for secure and reliable signal processing that can survive harsh conditions like radiation and vibration.

Healthcare: Supports faster medical imaging, on-the-spot diagnostics, and compact portable devices.

Data Centers & AI: Provides efficient acceleration for AI tasks, analytics, and workloads that demand both speed and energy savings.

IoT & Edge Devices: Useful for lightweight, low-power designs where flexible hardware customization is needed close to the data source.

 Yes, I think FPGAs will accelerate AI applications and advancements. As the AI industry is now evolving, experimenting with new functionality and validating it in real-time is necessary before solutions are ready for the market, and so FPGAs are ideal for this.

 As resources are limited, FPGAs can be customized for running neural networks with low latency and power efficiency. They are already being used in data centers for accelerating neural networks, in autonomous systems for real-time decision making, and in healthcare for fast image analysis.

In the near future, I think FPGAs can evolve with dedicated AI blocks, on-chip HBM memory, and tighter CPU-FPGA integration, making them more efficient for training as well as interface. 

With the rise of domain-specific optimizations and AI-assisted design tools, FPGAs will become more developer-friendly, helping bridge the gap between software and hardware design.

This means they will continue to be a strong alternative where flexibility, adaptability, and real-time processing are critical.

In sectors like finance and defense, even small vulnerabilities can have huge consequences. So, ensuring the security and integrity of FPGA design is critical. 

Security starts with bitstream protection by encrypting and authenticating the configuration files so that any malicious actors cannot tamper with or reverse-engineer the design. 

Many modern FPGAs also provide secure boot features and hardware-based root of trust, ensuring that only trusted code can run on the device.

On top of that, designers can implement runtime monitoring, access controls, and hardware isolation techniques to prevent unauthorized access.

In finance, this prevents manipulation in high-frequency trading systems, while in defense, it helps protect sensitive signal processing and communication channels.

I’d say the first and most important step is to build a strong foundation in the fundamentals, digital design concepts, RTL design, and languages like VHDL and Verilog/SystemVerilog. 

Once you’re comfortable with that, it’s helpful to learn about FPGA architecture and understand how it differs from ASICs, as this will give you a perspective on how to optimize designs for different applications.

Next, get hands-on experience with verification tools like QuestaSim, ModelSim, or Vivado, as they help you test and validate your designs. When you’re just starting, it’s normal not to know what project to make. A good approach is to start small and explore open-source FPGA projects on platforms like GitHub- for example, simple embedded systems, LED controllers, UART interfaces, or basic AI accelerators. 

Study how they work, and then try modifying or building upon them to deepen your understanding. This experimentation gives you practical experience and gradually prepares you to tackle more complex designs.

Finally, stay updated with industry trends by following FPGA vendor blogs from Xilinx/AMD, Intel, and similar sources. Keeping an eye on new tools, AI-focused workflows, and emerging applications in embedded systems, finance, and edge computing will help you stay relevant and grow your skills in this fast-evolving field.