FPGA Insights has engaged in an exclusive interview with Luca Colombini, Senior FPGA design engineer at CAEN SPA
Q1) Can you provide an overview of your organizations and the services/products it offers?
I work in another business unit which develops fast digitizers board with a sampling rate between 62.5 MPS up to 5 GSPS. The physics researchers community has strong technical skills in electronics and microcontrollers/DSP, but it lacks some expertise in advanced FPGA development. We want to help that community to bridge the gap. We provide boards with a completely open FPGA for end customer design (such as V2495). Not only that, but we recently have started to distribute a new family of digitizers with an option for remote customization.
Furthermore, we have setup a service for the end customer to develop a custom firmware on a subset of the overall large FPGA device available on board (AMD Zynq Ultrascale+ device). They develop their own algorithms for detector data procesing, leveraging also a new graphical design entry tool, and we provide e service for them to compile in the cloud. The outcome of this process is an upgrade package for the board which includes bitstream, libraries and all the dependencies.
We want to leverage the FPGA technology to provide flexible products to the end customer. In our market, the possibility to adapt the hardware to a specific environment is crucial. And performances are key for digitizers.
Q2) Can you explain the benefits of using FPGAs over other types of processors?
Q3) What are the most significant trends observed in the FPGA industry over the past year? How will these trends shape the industry’s future?
There is an increasing importance of adopting standard libraries for simulation (I think about UVVM and OSVVM). Also the integration of already proven approach of the software development into the realm of FPGA, such as continuous integration. Tools like VUnit greatly pave the way to a larger adoption. Continuous deployment of firmware to FPGA on-board is an ongoing process.
High-level approaches to firmware development are increasingly popping up. Tools like Vivado HLS (C++ based design) or Python-based tools (Cocotb for simulation for instance) try to attract more and more software developers with the mermaid of high-level languages. But the road is still very long to get a high level tools that makes it all. Low-level timing analysis and design check is still needed to get an aggressive and ambitious FPGA design to fit.










